The present invention relates to a semiconductor device for driving a motor, and a three-phase motor, a motor driving apparatus and a fan motor which are equipped with the semiconductor device.
Three-phase permanent-magnet motors controlled by an inverter are widely used in recent years as motors for household electric appliances and for industrial use. Since noise reduction is required of the motors, the 180-degree sine wave drive is used in many cases as the driving method for the inverter.
An example of the 180-degree sine wave drive as a conventional technology will be explained below referring to FIG. 16.
As shown in FIG. 16, a motor driving semiconductor device 10B with six input terminals (hereinafter referred to as a “six-input motor driving IC 10B”) is equipped with a motor driving semiconductor chip 10B′ with six input terminals. In FIG. 16, the reference characters T1-T6 denote six switching elements (e.g. IGBTs (Insulated Gate Bipolar Transistors)) for driving a three-phase motor, and D1-D6 denote flywheel diodes which are connected in antiparallel with the IGBTs, respectively. The reference characters P9, P10 and P11 denote a U-phase output terminal, a V-phase output terminal and a W-phase output terminal. The output terminals are connected to coils 8 of the motor.
The reference character VUT′ represents a U-phase top arm control signal, which is inputted through a U-phase top arm control signal input terminal P1 and transferred to an all-off circuit LG1, to a top arm driving circuit KT, and to the U-phase top arm IGBT T1. The reference character VVT′ represents a V-phase top arm control signal, which is inputted through a V-phase top arm control signal input terminal P2 and transferred to the all-off circuit LG1, to the top arm driving circuit KT, and to the V-phase top arm IGBT T2. The reference character VWT′ represents a W-phase top arm control signal, which is inputted through a W-phase top arm control signal input terminal P3 and transferred to the all-off circuit LG1, to the top arm driving circuit KT, and to the W-phase top arm IGBT T3. The reference character VUB′ represents a U-phase bottom arm control signal, which is inputted through a U-phase bottom arm control signal input terminal P4 and transferred to the all-off circuit LG1, to a bottom arm driving circuit KB, and to the U-phase bottom arm IGBT T4. The reference character VVB′ represents a V-phase bottom arm control signal, which is inputted through a V-phase bottom arm control signal input terminal P5 and transferred to the all-off circuit LG1, to the bottom arm driving circuit KT, and to the V-phase bottom arm IGBT T5. The reference character VWB′ represents a W-phase bottom arm control signal, which is inputted through a W-phase bottom arm control signal input terminal P6 and transferred to the all-off circuit LG1, to the bottom arm driving circuit KT, and to the W-phase bottom arm IGBT T6. The six control signals VUT′, VVT′, VWT′, VUB′, VVB′ and VWB′ are outputted by a controlling semiconductor device 7C having a dead time generating function.
A charge pump circuit CH generates a power supply voltage VCP for driving the upper arm IGBTs. Diodes D7 and D8 and capacitors C3 and C4 are external parts for the charge pump circuit CH. A clock signal VCL for the operation of the charge pump circuit CH is supplied to the charge pump circuit CH through a clock signal input terminal P12. The clock signal VCL is outputted by the controlling semiconductor device 7C with the dead time generating function.
An internal power supply circuit 11 generates a power supply voltage VB for the controlling semiconductor device 7C with the dead time generating function based on a driving circuit power supply voltage Vcc.
A Vcc undervoltage detecting circuit 14A monitors the driving circuit power supply voltage Vcc and outputs an undervoltage detection signal to a fault circuit 14C when the driving circuit power supply voltage Vcc falls to a threshold voltage or less. An overcurrent detecting circuit 14B outputs an overcurrent detection signal to the fault circuit 14C when the voltage of a shunt resistor Rs rises to a prescribed level or more. When the Vcc undervoltage detection signal from the Vcc undervoltage detecting circuit 14A or the overcurrent detection signal from the overcurrent detecting circuit 14B is received, the fault circuit 14C outputs an all-off signal VA to the all-off circuit LG1 while outputting a fault signal Vf to the controlling semiconductor device 7C with the dead time generating function through a fault signal output terminal P8. Upon reception of the all-off signal VA from the fault circuit 14C, the all-off circuit LG1 turns OFF all the IGBTs irrespective of the status (H or L) of the control signals VUT′, VVT′, VWT′, VUB′, VVB′ and VWB′.
Incidentally, the reference characters C1, C2 and C5 in FIG. 16 denote capacitors for the stabilization of power supply.
In the conventional technology shown in FIG. 16, the controlling semiconductor device 7C with the dead time generating function and the six-input motor driving IC 10B, as separate components, are connected together generally by wiring on a printed circuit board. For example, when the conventional technology of FIG. 16 is employed for a fan motor of an air conditioner, the wiring (generally extending for approximately 5 cm-10 cm) is more susceptible to noise compared to wiring inside an IC. The ill effect of noise can be reduced if the length of the aforementioned wiring on the printed circuit board can be shortened. The temperature around the six-input motor driving IC 10B (IC with high power consumption) tends to get high. Meanwhile, the operating temperature range of the controlling semiconductor device 7C with the dead time generating function is narrower than that of the six-input motor driving IC 10B. Especially when the controlling semiconductor device 7C with the dead time generating function is implemented by a microcomputer, the maximum value of the operating ambient temperature is as low as approximately 80° C.-100° C., for example. Therefore, a considerably long distance has to be kept between the controlling semiconductor device 7C with the dead time generating function and the six-input motor driving IC 10B in order to prevent high temperature of the controlling semiconductor device 7C with the dead time generating function. As above, there exists a certain limit to the reduction of the ill effect of noise by shortening the distance between the controlling semiconductor device 7C with the dead time generating function and the six-input motor driving IC 10B.
A timing chart of the 180-degree sine wave drive as a conventional technology will be explained referring to FIG. 17. FIG. 17 shows the timing chart of the 180-degree sine wave drive just for one phase (U-phase). In the U-phase top arm control signal VUT′ and the U-phase bottom arm control signal VUB′ shown in FIG. 17, “H” represents an ON signal and “L” represents an OFF signal. A dead time Td′ is secured between an ON signal of a control signal and that of the other control signal. The dead time Td′ is a time for preventing the top and bottom arms from simultaneously turning ON and breaking.
A case where noise is added to a control signal in the conventional 180-degree sine wave drive technology will be explained referring to FIG. 18. The difference from FIG. 17 is the existence of noise added to the U-phase top arm control signal VUT′. The noise is added during an OFF period of the U-phase top arm control signal VUT′. Due to a leap in the electric potential caused by the noise, the U-phase top arm turns ON at this point in time and a short circuit occurs to the top and bottom arms for a period Tx.
An inverter module having three control signal input terminals has been described in JP-A-2001-327171 (hereinafter referred to as a “patent document #1”). As described in the patent document #1, the inverter module includes a plurality of components placed in a casing formed of epoxy resin, etc. The components are connected together by wiring. The inverter module with three control signal input terminals receives three control signals and immediately generates six control signals with the dead time. The six control signals with the dead time travel through wiring inside an inverter module. The inverter module is in a shape like a rectangular parallelepiped with a maximum length (longest side) of approximately 10 cm-20 cm. Therefore, the longest line included in the wiring connecting the components and carrying the six control signals with the dead time extends for as long as approximately 5 cm-10 cm. Thus, the susceptibility of the line to the noise is equivalent to that of the aforementioned wiring connecting the six-input motor driving IC 10B and the controlling semiconductor device 7C with the dead time generating function in the conventional 180-degree sine wave drive technology shown in FIG. 16.
As above, the invention disclosed in the patent document #1 was made for the purpose of miniaturization and cost reduction of the inverter module, not for realizing countermeasures against the aforementioned noise.
In cases of inverter modules, breakage of the module due to a short circuit of the top and bottom arms is prevented generally by providing the inverter module with a short-circuit protection device, as described also in the patent document #1.
While a short circuit of the top and bottom arms occurring due to an abnormality in a control signal caused by noise has been explained referring to FIG. 18, the short of the top and bottom arms due to a control signal abnormality can be caused by a different mechanism. In the conventional 180-degree sine wave drive technology shown in FIG. 16, the power supply voltage VB for the controlling semiconductor device 7C with the dead time generating function is supplied by the six-input motor driving IC 10B. In this case, upon startup (rise) of the power supply voltage Vcc for the six-input motor driving IC 10B, the power supply voltage VB for the controlling semiconductor device 7C rises a little after the rise of Vcc. Thus, a time period in which the six-input motor driving IC 10B is already in an operable state (with the power supply voltage Vcc already risen) but the controlling semiconductor device 7C with the dead time generating function has not started outputting the control signals (with the power supply voltage VB not risen sufficiently or risen just for an insufficient time) can occur temporarily. In such cases, the six control signals remain indefinite, which can cause “top-bottom short-circuit” (simultaneous ON state of the top and bottom arms, letting through the so-called “through current”) of the six-input motor driving IC 10B.